LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 471
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
UM10237_4
User manual
Fig 75. Receive buffer layout for standard and extended frame format configurations
31
31
RX
RX
unused
RX Data 4
RX Data 8
RX Data 4
RX Data 8
6.5 Error Management Logic (EML)
6.6 Bit Timing Logic (BTL)
6.7 Bit Stream Processor (BSP)
6.8 CAN controller self-tests
Frame info
Frame info
ID.28
The EML is responsible for the error confinement. It gets error announcements from the
BSP and then informs the BSP and IML about error statistics.
The Bit Timing Logic monitors the serial CAN Bus line and handles the Bus line related bit
timing. It synchronizes to the bit stream on the CAN Bus on a "recessive" to "dominant"
Bus line transition at the beginning of a message (hard synchronization) and
re-synchronizes on further transitions during the reception of a message (soft
synchronization). The BTL also provides programmable time segments to compensate for
the propagation delay times and phase shifts (e.g. due to oscillator drifts) and to define the
sample point and the number of samples to be taken within a bit time.
The Bit Stream Processor is a sequencer, controlling the data stream between the
Transmit Buffer, Receive Buffers and the CAN Bus. It also performs the error detection,
arbitration, stuffing and error handling on the CAN Bus.
The CAN controller of the LPC2000 family supports two different options for self-tests:
•
•
24 23
24 23
Global Self-Test (setting the self reception request bit in normal Operating Mode)
Local Self-Test (setting the self reception request bit in Self Test Mode)
unused
unused
unused
RX Data 3
RX Data 7
RX Data 3
RX Data 7
RX DLC
RX DLC
Extended Frame Format (29-bit Identifier)
Standard Frame Format (11-bit Identifier)
16 15
16 15
...
Rev. 04 — 26 August 2009
unused
unused
RX Data 2
RX Data 6
RX Data 2
RX Data 6
10 9 8 7
10 9 8 7
ID.28 ... ID.18
ID Index
ID Index
Chapter 18: LPC24XX CAN controllers CAN1/2
RX Data 1
RX Data 5
RX Data 1
RX Data 5
ID.00
0
0
RDA
RDB
RDA
RDB
RFS
RFS
RID
RID
BPM=bypass
message
Descriptor
Data Field
Descriptor
Data Field
Field
Field
UM10237
© NXP B.V. 2009. All rights reserved.
471 of 792
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