LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 434
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
- Current page: 434 of 792
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NXP Semiconductors
UM10237_4
User manual
4.10 UARTn Auto-baud Control Register (U0ACR - 0xE000 C020, U2ACR -
4.9 UARTn Scratch Pad Register (U0SCR - 0xE000 C01C, U2SCR -
0xE007 801C U3SCR - 0xE007 C01C)
The UnSCR has no effect on the UARTn operation. This register can be written and/or
read at user’s discretion. There is no provision in the interrupt interface that would indicate
to the host that a read or write of the UnSCR has occurred.
Table 388. UARTn Scratch Pad Register (U0SCR - address 0xE000 C01C,
0xE007 8020, U3ACR - 0xE007 C020)
The UARTn Auto-baud Control Register (UnACR) controls the process of measuring the
incoming clock/data rate for the baud rate generation and can be read and written at
user’s discretion.
Table 389. UARTn Auto-baud Control Register (U0ACR - 0xE000 C020, U2ACR -
Bit Symbol Description
7:0 Pad
Bit
0
1
2
7:3
8
9
31:10 -
Symbol
Start
Mode
AutoRestart 0
-
ABEOIntClr
ABTOIntClr
U2SCR - 0xE007 801C, U3SCR - 0xE007 C01C) bit description
0xE007 8020, U3ACR - 0xE007 C020) bit description
A readable, writable byte.
Value Description
0
1
0
1
1
NA
NA
Rev. 04 — 26 August 2009
This bit is automatically cleared after auto-baud
completion.
Auto-baud stop (auto-baud is not running).
Auto-baud start (auto-baud is running).Auto-baud run
bit. This bit is automatically cleared after auto-baud
completion.
Auto-baud mode select bit.
Mode 0.
Mode 1.
No restart.
Restart in case of time-out (counter restarts at next
UART0 Rx falling edge)
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
End of auto-baud interrupt clear bit (write only
accessible). Writing a 1 will clear the corresponding
interrupt in the UnIIR. Writing a 0 has no impact.
Auto-baud time-out interrupt clear bit (write only
accessible). Writing a 1 will clear the corresponding
interrupt in the UnIIR. Writing a 0 has no impact.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
Chapter 16: LPC24XX UART0/2/3
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0
0
0
0
0
0
0
0
Reset
Value
0x00
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