LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 437
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
UM10237_4
User manual
4.12 UARTn Fractional Divider Register (U0FDR - 0xE000 C028, U2FDR -
4.11 IrDA Control Register for UART3 Only (U3ICR - 0xE007 C024)
The IrDA Control Register enables and configures the IrDA mode for UART3 only. The
value of U3ICR should not be changed while transmitting or receiving data, or data loss or
corruption may occur.
Table 390. IrDA Control Register for UART3 only (U3ICR - address 0xE007 C024) bit
The PulseDiv bits in U3ICR are used to select the pulse width when the fixed pulse width
mode is used in IrDA mode (IrDAEn = 1 and FixPulseEn = 1). The value of these bits
should be set so that the resulting pulse width is at least 1.63 µs.
possible pulse widths.
Table 391. IrDA Pulse Width
0xE007 8028, U3FDR - 0xE007 C028)
The UART0/2/3 Fractional Divider Register (U0/2/3FDR) controls the clock pre-scaler for
the baud rate generation and can be read and written at the user’s discretion. This
pre-scaler takes the APB clock and generates an output clock according to the specified
fractional requirements.
Important: If the fractional divider is active (DIVADDVAL > 0) and DLM = 0, the value of
the DLL register must be 3 or greater.
Bit
0
1
2
5:3
31:6 -
FixPulseEn
0
1
1
1
1
1
1
1
1
Symbol
IrDAEn
IrDAInv
FixPulseEn
PulseDiv
description
Value Description
0
1
NA
Rev. 04 — 26 August 2009
IrDA mode on UART3 is disabled, UART3 acts as a
standard UART.
IrDA mode on UART3 is enabled.
When 1, the serial input is inverted. This has no effect
on the serial output. When 0, the serial input is not
inverted.
When 1, enabled IrDA fixed pulse width mode.
Configures the pulse when FixPulseEn = 1. See text
below for details.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
PulseDiv
x
0
1
2
3
4
5
6
7
IrDA Transmitter Pulse width (µs)
3 / (16 × baud rate)
2 × T
4 × T
8 × T
16 × T
32 × T
64 × T
128 × T
256 × T
Chapter 16: LPC24XX UART0/2/3
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
Table 16–391
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0
0
0
0
0
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