LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 435
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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- Download datasheet (5Mb)
NXP Semiconductors
UM10237_4
User manual
4.10.1 Auto-baud
4.10.2 Auto-baud modes
The UARTn auto-baud function can be used to measure the incoming baud-rate based on
the ”AT" protocol (Hayes command). If enabled the auto-baud feature will measure the bit
time of the receive data stream and set the divisor latch registers UnDLM and UnDLL
accordingly.
Auto-baud is started by setting the UnACR Start bit. Auto-baud can be stopped by clearing
the UnACR Start bit. The Start bit will clear once auto-baud has finished and reading the
bit will return the status of auto-baud (pending/finished).
Two auto-baud measuring modes are available which can be selected by the UnACR
Mode bit. In mode 0 the baud-rate is measured on two subsequent falling edges of the
UARTn Rx pin (the falling edge of the start bit and the falling edge of the least significant
bit). In mode 1 the baud-rate is measured between the falling edge and the subsequent
rising edge of the UARTn Rx pin (the length of the start bit).
The UnACR AutoRestart bit can be used to automatically restart baud-rate measurement
if a time-out occurs (the rate measurement counter overflows). If this bit is set the rate
measurement will restart at the next falling edge of the UARTn Rx pin.
The auto-baud function can generate two interrupts.
The auto-baud interrupts have to be cleared by setting the corresponding UnACR
ABTOIntClr and ABEOIntEn bits.
The fractional baud-rate generator is disabled (DIVADDVAL = 0) during auto-baud. When
auto-baud is used, any write to UnDLM and UnDLL registers should be done before
UnACR register write. The minimum and the maximum baudrates supported by UARTn
are function of pclk, number of data bits, stop bits and parity bits.
When the software is expecting an ”AT" command, it configures the UARTn with the
expected character format and sets the UnACR Start bit. The initial values in the divisor
latches UnDLM and UnDLM don‘t care. Because of the ”A" or ”a" ASCII coding
(”A" = 0x41, ”a" = 0x61), the UARTn Rx pin sensed start bit and the LSB of the expected
character are delimited by two falling edges. When the UnACR Start bit is set, the
auto-baud protocol will execute the following phases:
1. On UnACR Start bit setting, the baud-rate measurement counter is reset and the
•
•
ratemin
The UnIIR ABTOInt interrupt will get set if the interrupt is enabled (UnIER ABToIntEn
is set and the auto-baud rate measurement counter overflows).
The UnIIR ABEOInt interrupt will get set if the interrupt is enabled (UnIER ABEOIntEn
is set and the auto-baud has completed successfully).
UARTn UnRSR is reset. The UnRSR baud rate is switch to the highest rate.
=
2 P
------------------------ -
16 2 15
× CLK
×
Rev. 04 — 26 August 2009
≤
UART
n
baudrate
≤
----------------------------------------------------------------------------------------------------------- -
16
×
(
2
+
databits
Chapter 16: LPC24XX UART0/2/3
PCLK
+
paritybits
+
UM10237
stopbits
© NXP B.V. 2009. All rights reserved.
)
=
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