R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 1036

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 20 USB Function Module (USB)
20.5
20.5.1
The above flowchart shows the operation in the case of in section 20.9, Example of USB External
Circuitry.
In applications that do not require USB cable connection to be detected, processing by the USB
bus connection interrupt is not necessary. Preparations should be made with the bus-reset
interrupt.
Rev. 2.00 Sep. 24, 2008 Page 1002 of 1468
REJ09B0412-0200
No
Operation
Cable Connection
USB bus connection interrupt
reception complete interrupt
Wait for setup command
UDC core reset release
USB cable connection
D+ pull-up enabled?
Cable disconnected
General output port
Bus reset reception
Bus reset interrupt
IFR1.VBUSF = 1
VBUS pin = 0 V
UDC core reset
IFR0.BRST = 1
USB function
Yes
Figure 20.2 Cable Connection Operation
Interrupt request
Interrupt request
start of USB communication
reception complete interrupt
Firmware preparations for
completed, enable D+ pull-up
Wait for setup command
As soon as preparations are
(EP0, EP1, EP2, EP3)
Clear bus reset flag
Clear VBUSF flag
USB module interrupt
in general output port
(IFR1.VBUSF)
(IFR0.BRST)
Clear FIFOs
Application
setting
Initial
settings

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