R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 1276

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 28 Power-Down Modes
[Legend]
x: Don't care
Note: With the F-ZTAT version, the flash memory settling time must be reserved.
28.2.2
MSTPCRA and MSTPCRB control module stop state. Setting a bit to 1 makes the corresponding
module enter module stop state, while clearing the bit to 0 clears module stop state.
• MSTPCRA
Rev. 2.00 Sep. 24, 2008 Page 1242 of 1468
REJ09B0412-0200
Bit
7
6 to 0
Bit
Bit name
Initial value:
R/W:
Bit
Bit name
Initial value:
R/W:
Bit Name
SLPIE
Module Stop Control Registers A and B (MSTPCRA and MSTPCRB)
MSTPA7
ACSE
R/W
R/W
15
0
7
1
Initial
Value
0
All 0
MSTPA14
MSTPA6
R/W
R/W
14
0
6
1
R/W
R/W
R/W
MSTPA13
MSTPA5
R/W
R/W
13
5
1
0
Description
Sleep Instruction Exception Handling Enable
Selects whether a sleep interrupt is generated or a
transition to power-down mode is made when a SLEEP
instruction is executed.
0: A transition to power-down mode is made when a
1: A sleep instruction exception handling is generated
Even after a sleep instruction exception handling is
executed, this bit remains set to 1. For clearing, write 0 to
this bit.
Reserved
These bits are always read as 0. The write value should
always be 0.
SLEEP instruction is executed.
when a SLEEP instruction is executed.
MSTPA12
MSTPA4
R/W
R/W
12
0
4
1
MSTPA11
MSTPA3
R/W
R/W
11
1
3
1
MSTPA10
MSTPA2
R/W
R/W
10
1
2
1
MSTPA9
MSTPA1
R/W
R/W
9
1
1
1
MSTPA0
MSTPA8
R/W
R/W
0
1
8
1

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