R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 853

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
16.3.1
TCNT is an 8-bit readable/writable up-counter. TCNT_0 and TCNT_1 comprise a single 16-bit
register so they can be accessed together by a word transfer instruction. Bits CKS2 to CKS0 in
TCR and bits ICKS1 and ICKS0 in TCCR are used to select a clock. TCNT can be cleared by an
external reset input signal, compare match A signal, or compare match B signal. Which signal to
be used for clearing is selected by bits CCLR1 and CCLR0 in TCR. When TCNT overflows from
H'FF to H'00, bit OVF in TCSR is set to 1. TCNT is initialized to H'00.
16.3.2
TCORA is an 8-bit readable/writable register. TCORA_0 and TCORA_1 comprise a single 16-bit
register so they can be accessed together by a word transfer instruction. The value in TCORA is
continually compared with the value in TCNT. When a match is detected, the corresponding
CMFA flag in TCSR is set to 1. Note however that comparison is disabled during the T2 state of a
TCORA write cycle. The timer output from the TMO pin can be freely controlled by this compare
match signal (compare match A) and the settings of bits OS1 and OS0 in TCSR. TCORA is
initialized to H'FF.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Timer Counter (TCNT)
Time Constant Register A (TCORA)
R/W
R/W
7
0
7
1
R/W
R/W
6
0
6
1
R/W
R/W
5
0
5
1
R/W
TCORA_0
R/W
TCNT_0
4
0
4
1
R/W
R/W
3
0
3
1
R/W
R/W
2
0
2
1
R/W
R/W
1
0
1
1
R/W
R/W
0
0
0
1
R/W
R/W
7
0
7
1
Rev. 2.00 Sep. 24, 2008 Page 819 of 1468
R/W
R/W
6
0
6
1
R/W
R/W
5
0
5
1
Section 16 8-Bit Timers (TMR)
R/W
TCORA_1
R/W
TCNT_1
4
0
4
1
R/W
R/W
3
0
3
1
R/W
R/W
REJ09B0412-0200
2
0
2
1
R/W
R/W
1
0
1
1
R/W
R/W
0
0
0
1

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