R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 162

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Exception Handling
6.9
When performing stack-manipulating access, this LSI assumes that the lowest address bit is 0. The
stack should always be accessed by a word transfer instruction or a longword transfer instruction,
and the value of the stack pointer (SP: ER7) should always be kept even. Use the following
instructions to save registers:
Use the following instructions to restore registers:
Performing stack manipulation while SP is set to an odd value leads to an address error. Figure 6.4
shows an example of operation when the SP value is odd.
Rev. 2.00 Sep. 24, 2008 Page 128 of 1468
REJ09B0412-0200
PUSH.W
PUSH.L
POP.W
POP.L
SP
[Legend]
CCR :
PC :
R1L :
SP :
Note: This diagram illustrates an example in which the interrupt control mode is 0, in advanced mode.
Usage Note
SP set to H'FFFEFF
Rn
ERn
Rn
ERn
Condition code register
Program counter
General register R1L
Stack pointer
(or MOV.W Rn, @-SP)
(or MOV.L ERn, @-SP)
(or MOV.W @SP+, Rn)
(or MOV.L @SP+, ERn)
TRAPA instruction executed
Figure 6.4 Operation when SP Value is Odd
(Address error occurred)
SP
Data saved above SP
CCR
PC
MOV.B R1L, @-ER7 executed
SP
Contents of CCR lost
R1L
PC
H'FFFEFA
H'FFFEFB
H'FFFEFC
H'FFFEFD
H'FFFEFE
H'FFFEFF
Address

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