R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 1126

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 A/D Converter
22.7
22.7.1
Operation of the A/D converter can be disabled or enabled using the module stop control register.
The initial setting is for operation of the A/D converter to be halted. Register access is enabled by
clearing the module stop state. Set the CKS1 and CKS2 bits to 1 and clear the ADST, TRGS1,
TRGS0, and EXTRGS bits all to 0 to disable A/D conversion when entering module stop state
after operation of the A/D converter. After that, set the module stop control register after executing
a dummy read by one word. For details, see section 28, Power-Down Modes.
22.7.2
When this LSI enters software standby mode with A/D conversion enabled, the analog inputs are
retained, and the analog power supply current is equal to as during A/D conversion. If the analog
power supply current needs to be reduced in software standby mode, set the CKS1 and CKS2 bits
to 1 and clear the ADST, TRGS1, TRGS0, and EXTRGS bits all to 0 to disable A/D conversion.
After that, enter software standby mode after executing a dummy read by one word.
22.7.3
If any of actions (1 to 3 below) is performed while activation by an external trigger* is in use,
stopping A/D conversion may be impossible.
Note: * External trigger refers to input on the ADTRG pin or the conversion trigger from a
1. When the setting for activation by an external trigger is in use, writing to change the value of
2. Changing the setting from activation by an external trigger to prohibition of external triggers.
3. Changing the scan mode (SCANE and ADSTLCR bits; from continuous scan mode to single
If any of the above points apply, make the corresponding settings listed below.
1. If point 1 is applicable
2. If points 2 or 3 is applicable
Rev. 2.00 Sep. 24, 2008 Page 1092 of 1468
REJ09B0412-0200
the ADST bit in ADCSR from 0 to 1.
mode or single-cycle scan mode) while the setting is for activation by an external trigger.
Do not perform writing to change the value of the ADST bit in ADCSR from 0 to 1 when the
setting for activation by an external trigger is in use.
Usage Notes
Module Stop Function Setting
A/D Input Hold Function in Software Standby Mode
Notes on A/D Activation by an External Trigger
peripheral module (TMR or TPU).