R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 527

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The source address extended repeat area is specified by bits SARA4 to SARA0 in EDACR, and
the destination address extended repeat area by bits DARA4 to DARA0 in EDACR. The size of
each extended repeat area can be specified independently.
When the address register value is the last address in the extended repeat area and extended repeat
area overflow occurs, EXDMA transfer can be temporarily halted and an extended repeat area
overflow interrupt request can be generated for the CPU. If the SARIE bit in EDACR is set to 1,
and the EDSAR extended repeat area overflows, the ESIF bit is set to 1 and the DTE bit cleared to
0 in EDMDR, and transfer is terminated. If the ESIE bit is set to 1 in EDMDR, an extended repeat
area overflow interrupt is requested to the CPU. If the DARIE bit in EDACR is set to 1, the above
applies to the destination address register. If the DTE bit in EDMDR is set to 1 during interrupt
generation, transfer is resumed.
Figure 11.15 illustrates the operation of the extended repeat area function.
Figure 11.15 Example of Extended Repeat Area Function Operation
When lower 3 bits (8-byte area) of EDSAR are designated
as extended repeat area (SARA4 to SARA0 = B'00011)
External memory
H'23FFFE
H'23FFFF
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
H'240008
H'240009
Range of
EDSAR values
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
Repeat
Extended repeat area overflow
interrupt can be requested
Rev. 2.00 Sep. 24, 2008 Page 493 of 1468
Section 11 EXDMA Controller (EXDMAC)
REJ09B0412-0200

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