R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 1118

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 A/D Converter
(2)
1. Set the ADSTCLR bit in ADCR to 1.
2. When the ADST bit in ADCSR is set to 1 by software, TMR (units 2 and 3), or an external
3. When A/D conversion for each channel is completed, the A/D conversion result is sequentially
4. When A/D conversion of all selected channels is completed, the ADF bit in ADCSR is set to 1.
5. The ADST bit is automatically cleared when A/D conversion is completed for all of the
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Channel 5 (AN5)
Channel 4 (AN4)
Channel 6 (AN6)
ADST
ADF
Channel 7 (AN7)
ADDRE
ADDRF
ADDRG
ADDRH
operation state
operation state
operation state
operation state
trigger input, A/D conversion starts on the first channel in the specified channel group.
Consecutive A/D conversion on a maximum of four channels (SCANE and SCANS = B'10)
can be selected. For unit 1, A/D conversion starts on AN4 when CH3 and CH2 = B’01.
transferred to the corresponding ADDR of each channel.
If the ADIE bit is set to 1 at this time, an ADI interrupt request is generated.
channels that have been selected. A/D conversion stops and the A/D converter enters a wait
state.
One-Cycle Scan Mode (only enabled in unit 1)
Note: ↓ indicates the timing of instruction execution by software.
Waiting for conversion
(One-Cycle Scan Mode, Three Channels (AN4 to AN6) Selected)
Waiting for conversion
Waiting for conversion
A/D conversion time
A/D conversion 1
Set *
Figure 22.5 Example of A/D Conversion
A/D conversion one-cycle execution
Transfer
A/D conversion 2
A/D conversion result 1
Waiting for conversion
A/D conversion 3
A/D conversion result 2
A/D conversion result 3
Waiting for conversion
Waiting for conversion
Waiting for conversion
Clear*