ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 231

MCU 8BIT 128K ISP FLASH 64-TQFP

ATMEGA128A-AU

Manufacturer Part Number
ATMEGA128A-AU
Description
MCU 8BIT 128K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4784435

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22.3
22.3.1
22.3.2
8151H–AVR–02/11
Register Description
SFIOR - Special Function IO Register
ACSR - Analog Comparator Control and Status Register
If ACME is cleared or ADEN is set, AIN1 is applied to the negative input to the Analog
Comparator.
Table 2. Analog Comparator Multiplexed Input
• Bit 3 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ACME
0
1
1
1
1
1
1
1
1
1
TSM
R/W
ADEN
7
0
ACD
R/W
1
0
0
0
0
0
0
0
0
x
7
0
ACBG
R
R/W
6
0
“Analog Comparator Multiplexed Input” on page
6
0
MUX2:0
000
001
010
011
100
101
110
111
xxx
xxx
ACO
N/A
R
R
5
0
5
Analog Comparator Negative Input
AIN1
AIN1
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
R/W
ACI
4
0
R
4
0
ACIE
R/W
ACME
3
0
R/W
3
0
ACIC
R/W
PUD
2
0
R/W
2
0
ACIS1
ATmega128A
R/W
PSR0
R/W
1
0
1
0
230.
ACIS0
PSR321
R/W
R/W
0
0
0
0
ACSR
SFIOR
231

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