ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 282

• Manufacturer Part Number: ATMEGA128A-AU
• Description: MCU 8BIT 128K ISP FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4784435

25.7
8151H–AVR–02/11
Addressing the Flash During Self-Programming
Note:
The Z-pointer together with RAMPZ are used to address the SPM commands. For details on
how to use the RAMPZ, see “RAMPZ - RAM Page Z Select Register” on page 14.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
independently. Therefore it is of major importance that the Boot Loader software addresses the
same page in both the page erase and page write operation. Once a programming operation is
initiated, the address is latched and the Z-pointer/RAMPZ can be used for other operations.
The only SPM operation that does not use the Z-pointer/RAMPZ is setting the Boot Loader Lock
bits. The content of the Z-pointer/RAMPZ is ignored and will have no effect on the operation.
The (E)LPM instruction does also use the Z-pointer/RAMPZ to store the address. Since this
instruction addresses the Flash byte by byte, also the LSB (bit Z0) of the Z-pointer is used.
Figure 25-3. Addressing the Flash During SPM
Notes:
Bit
ZH (R31)
ZL (R30)
1. “1” means unprogrammed, “0´means programmed
1. The different variables used in
2. PCPAGE and PCWORD are listed in
RAMPZ
PROGRAM
COUNTER
PROGRAM MEMORY
PAGE
Figure
Z15
15
Z7
7
PCMSB
PAGE ADDRESS
WITHIN THE FLASH
BIT
15
25-3. Note that the page erase and page write operations are addressed
ZPCMSB
Z14
14
Z6
6
PCPAGE
Z13
13
Z5
5
Figure 25-3
Table 26-10 on page
Z12
12
Z4
Table 26-11 on page
4
PAGEMSB
ZPAGEMSB
WORD ADDRESS
WITHIN A PAGE
(1)
PCWORD
are listed in
Z11
11
Z3
3
INSTRUCTION WORD
1
PAGE
0
0
Table 25-8 on page
Z10
10
Z2
2
Z - REGISTER
296.
296), the program counter can
ATmega128A
Z9
Z1
9
1
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
288.
Z8
Z0
8
0
282