ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 302

• Manufacturer Part Number: ATMEGA128A-AU
• Description: MCU 8BIT 128K ISP FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4784435

26.6.11
26.6.12
8151H–AVR–02/11
Programming the Lock Bits
Reading the Fuse and Lock Bits
Figure 26-5. Programming the Fuses
The algorithm for programming the Lock bits is as follows (refer to
page 297
The Lock bits can only be cleared by executing Chip Erase.
The algorithm for reading the Fuse and Lock bits is as follows (refer to
on page 297
1. A: Load Command “0010 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs the Lock bit.
3. Give WR a negative pulse and wait for RDY/BSY to go high.
1. A: Load Command “0000 0100”.
2. Set OE to “0”, BS2 to “0”, and BS1 to “0”. The status of the Fuse Low bits can now be
3. Set OE to “0”, BS2 to “1”, and BS1 to “1”. The status of the Fuse High bits can now be
4. Set OE to “0”, BS2 to “1”, and BS1 to “0”. The status of the Extended Fuse bits can now
5. Set OE to “0”, BS2 to “0”, and BS1 to “1”. The status of the Lock bits can now be read at
6. Set OE to “1”.
RESET +12V
read at DATA (“0” means programmed).
read at DATA (“0” means programmed).
be read at DATA (“0” means programmed).
DATA (“0” means programmed).
RDY/BSY
PAGEL
XTAL1
DATA
BS2
XA1
XA0
BS1
for details on Command and Data loading):
WR
OE
for details on Command loading):
$40
A
DATA
C
Write Fuse Low byte
XX
$40
A
DATA
C
Write Fuse high byte
XX
“Programming the Flash” on
$40
A
ATmega128A
“Programming the Flash”
DATA
C
Write Extended Fuse byte
XX
302