ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 88

MCU 8BIT 128K ISP FLASH 64-TQFP

ATMEGA128A-AU

Manufacturer Part Number
ATMEGA128A-AU
Description
MCU 8BIT 128K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4784435

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12.4.10
12.4.11
12.4.12
12.4.13
12.4.14
12.4.15
12.4.16
8151H–AVR–02/11
PINC - Port C Input Pins Address
PORTD - Port D Data Register
DDRD - Port D Data Direction Register
PIND - Port D Input Pins Address
PORTE - Port E Data Register
DDRE - Port E Data Direction Register
PINE - Port E Input Pins Address
In ATmega103 compatibility mode, DDRC and PINC Registers are initialized to being Push-Pull
Zero Output. The port pins assumes their initial value, even if the clock is not running. Note that
the DDRC and PINC Registers are available in ATmega103 compatibility mode, and should not
be used for 100% back-ward compatibility.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PORTD7
PORTE7
PINC7
PIND7
PINE7
DDD7
DDE7
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
7
7
0
7
0
7
7
0
7
7
0
PORTD6
PORTE6
PINC6
PIND6
PINE6
DDD6
DDE6
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
6
6
0
6
0
6
6
0
6
6
0
PORTD5
PORTE5
PINC5
PIND5
PINE5
DDD5
DDE5
R/W
R/W
R/W
N/A
R/W
N/A
N/A
R
R
R
5
0
5
5
0
5
5
5
0
5
0
PORTD4
PORTE4
PIND4
PINE4
PINC4
DDD4
DDE4
R/W
R/W
R/W
N/A
R/W
N/A
N/A
R
4
0
R
R
4
0
4
4
4
4
0
4
0
PORTD3
PORTE3
PIND3
PINE3
PINC3
DDD3
DDE3
R/W
R/W
R/W
N/A
R/W
N/A
N/A
R
3
0
R
R
3
0
3
3
3
3
0
3
0
PORTD2
PORTE2
PIND2
PINE2
PINC2
DDD2
DDE2
R/W
R/W
R/W
N/A
R/W
N/A
N/A
R
2
0
R
R
2
0
2
2
2
2
0
2
0
PORTD1
PORTE1
PIND1
DDE1
PINE1
ATmega128A
PINC1
DDD1
R/W
R/W
R/W
N/A
N/A
N/A
R/W
R
1
0
R
R
1
0
1
1
1
1
0
1
0
PORTD0
PORTE0
PIND0
DDE0
PINE0
PINC0
DDD0
R/W
R/W
R/W
N/A
N/A
N/A
R/W
R
0
0
R
R
0
0
0
0
0
0
0
0
0
PORTD
DDRE
DDRD
PORTE
PIND
PINF
PINC
88

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