ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 313

• Manufacturer Part Number: ATMEGA128A-AU
• Description: MCU 8BIT 128K ISP FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4784435

Table 26-16. JTAG Programming Instruction (Continued)
8151H–AVR–02/11
Instruction
2h. Poll for Page Write complete
3a. Enter Flash Read
3b. Load Address High Byte
3c. Load Address Low Byte
3d. Read Data Low and High Byte
4a. Enter EEPROM Write
4b. Load Address High Byte
4c. Load Address Low Byte
4d. Load Data Byte
4e. Latch Data
4f. Write EEPROM Page
4g. Poll for Page Write complete
5a. Enter EEPROM Read
5b. Load Address High Byte
5c. Load Address Low Byte
5d. Read Data Byte
6a. Enter Fuse Write
6b. Load Data Low Byte
6c. Write Fuse Extended byte
6d. Poll for Fuse Write complete
6e. Load Data Low Byte
6f. Write Fuse High byte
6g. Poll for Fuse Write complete
6h. Load Data Low Byte
Set (Continued)
(6)
(7)
(7)
a = address high bits, b = address low bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in, x
TDI sequence
0100011_00000010
0000111_aaaaaaaa
0000011_bbbbbbbb
0110010_00000000
0110110_00000000
0110111_00000000
0100011_00010001
0000111_aaaaaaaa
0000011_bbbbbbbb
0010011_iiiiiiii
0110111_00000000
1110111_00000000
0110111_00000000
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0100011_00000011
0000111_aaaaaaaa
0000011_bbbbbbbb
0110011_bbbbbbbb
0110010_00000000
0110011_00000000
0100011_01000000
0010011_iiiiiiii
0111011_00000000
0111001_00000000
0111011_00000000
0111011_00000000
0110111_00000000
0010011_iiiiiiii
0110111_00000000
0110101_00000000
0110111_00000000
0110111_00000000
0110111_00000000
0010011_iiiiiiii
0110111_00000000
0110011_00000000
TDO sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxox_xxxxxxxx
ATmega128A
Notes
(2)
(9)
low byte
high byte
(9)
(1)
(1)
(2)
(9)
(3)
(1)
(2)
(3)
(1)
(2)
(3)
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