ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 28

MCU 8BIT 128K ISP FLASH 64-TQFP

ATMEGA128A-AU

Manufacturer Part Number
ATMEGA128A-AU
Description
MCU 8BIT 128K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4784435

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7.5.9
8151H–AVR–02/11
Using all 64 Kbytes Locations of External Memory
Figure 7-10. Address Map with 32Kbytes External Memory
Since the External Memory is mapped after the Internal Memory as shown in
60Kbytes of External Memory is available by default (address space 0x0000 to 0x10FF is
reserved for internal memory). However, it is possible to take advantage of the entire External
Memory by masking the higher address bits to zero. This can be done by using the XMMn bits
and control by software the most significant bits of the address. By setting Port C to output 0x00,
and releasing the most significant bits for normal Port Pin operation, the Memory Interface will
address 0x0000 - 0x1FFF. See the following code examples.
0x0000
0x10FF
0x1100
0x7FFF
0x8000
0x90FF
0x9100
0xFFFF
AVR Memory Map
Internal Memory
External
(Unused)
Memory
Memory Configuration A
External 32K SRAM
0x0000
0x10FF
0x1100
0x7FFF
0x0000
0x0FFF
0x1000
0x7FFF
0x8000
0x8FFF
0x9000
0xFFFF
AVR Memory Map
Internal Memory
External
(Unused)
Memory
Memory Configuration B
ATmega128A
External 32K SRAM
Figure
0x0000
0x0FFF
0x1000
0x7FFF
7-4, only
28

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