ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 62

MCU 8BIT 128K ISP FLASH 64-TQFP

ATMEGA128A-AU

Manufacturer Part Number
ATMEGA128A-AU
Description
MCU 8BIT 128K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4784435

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11.1.1
8151H–AVR–02/11
Moving Interrupts Between Application and Boot Space
When the BOOTRST fuse is programmed and the Boot section size set to 8 Kbytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST fuse is programmed, the Boot section size set to 8 Kbytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
The General Interrupt Control Register controls the placement of the interrupt vector table.
$F004
:.
$F044
Address
.org $0002
$0002
$0004
:.
$0044
;
.org $F000
$F000
$F001
$F002
$F003
$F004
$F005
Address
;
.org $F000
$F000
$F002
$F004
:.
$F044
$F046
$F047
$F048
$F049
$F04A
$F04B
RESET: ldi
RESET: ldi
LabelsCode
jmp
:.
jmp
jmp
jmp
:.
jmp
out
ldi
out
sei
<instr>
jmp
jmp
jmp
:.
jmp
out
ldi
out
sei
<instr>
Labels
EXT_INT1
:.
SPM_RDY
EXT_INT0
EXT_INT1
:.
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
EXT_INT1
:.
SPM_RDY ; Store Program Memory Ready Handler
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
xxx
Code
; IRQ1 Handler
;
; Store Program Memory Ready Handler
Comments
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program Memory Ready Handler
; Set stack pointer to top of RAM
; Enable interrupts
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; Set stack pointer to top of RAM
; Enable interrupts
Comments
ATmega128A
62

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