ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 287

MCU 8BIT 128K ISP FLASH 64-TQFP

ATMEGA128A-AU

Manufacturer Part Number
ATMEGA128A-AU
Description
MCU 8BIT 128K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4784435

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8151H–AVR–02/11
Rdloop:
Return:
yet
Do_spm:
Wait_spm:
Wait_ee:
ld
ld
ldi
call Do_spm
adiw ZH:ZL, 2
sbiw loophi:looplo, 2
brne Wrloop
; execute page write
subi ZL, low(PAGESIZEB)
sbci ZH, high(PAGESIZEB)
ldi
call Do_spm
; re-enable the RWW section
ldi
call Do_spm
; read back and check, optional
ldi
ldi
subi YL, low(PAGESIZEB)
sbci YH, high(PAGESIZEB)
lpm
ld
cpse r0, r1
jmp
sbiw loophi:looplo, 1
brne Rdloop
; return to RWW section
; verify that RWW section is safe to read
lds
sbrs temp1, RWWSB
ret
; re-enable the RWW section
ldi
call Do_spm
rjmp Return
; check for previous SPM complete
lds
sbrc temp1, SPMEN
rjmp Wait_spm
; input: spmcsrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEWE
rjmp Wait_ee
; SPM timed sequence
sts
r0, Y+
r1, Y+
spmcsrval, (1<<SPMEN)
spmcsrval, (1<<PGWRT) | (1<<SPMEN)
spmcsrval, (1<<RWWSRE) | (1<<SPMEN)
looplo, low(PAGESIZEB);init loop variable
loophi, high(PAGESIZEB);not required for PAGESIZEB<=256
r0, Z+
r1, Y+
Error
temp1, SPMCSR
spmcsrval, (1<<RWWSRE) | (1<<SPMEN)
temp1, SPMCSR
temp2, SREG
SPMCSR, spmcsrval
; If RWWSB is set, the RWW section is not ready
;use subi for PAGESIZEB<=256
;restore pointer
;not required for PAGESIZEB<=256
;restore pointer
;use subi for PAGESIZEB<=256
ATmega128A
287

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