ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 306

• Manufacturer Part Number: ATMEGA128A-AU
• Description: MCU 8BIT 128K ISP FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4784435

26.8.3
8151H–AVR–02/11
Data Polling EEPROM
this value, the user will have to wait for at least t
a chip-erased device contains $FF in all locations, programming of addresses that are meant to
contain $FF, can be skipped. See
When a new byte has been written and is being programmed into EEPROM, reading the
address location being programmed will give the value $FF. At the time the device is ready for a
new byte, the programmed value will read correctly. This is used to determine when the next
byte can be written. This will not work for the value $FF, but the user should have the following in
mind: As a chip-erased device contains $FF in all locations, programming of addresses that are
meant to contain $FF, can be skipped. This does not apply if the EEPROM is re-programmed
without chip-erasing the device. In this case, data polling cannot be used for the value $FF, and
the user will have to wait at least t
for t
Table 26-14. Minimum Wait Delay before Writing the Next Flash or EEPROM Location, V
Figure 26-8. .SPI Serial Programming Waveforms
Symbol
t
t
t
t
WD_FUSE
WD_FLASH
WD_EEPROM
WD_ERASE
WD_EEPROM
SERIAL DATA OUTPUT
SERIAL CLOCK INPUT
SERIAL DATA INPUT
5V ±10%
value.
SAMPLE
(MOSI)
(MISO)
(SCK)
WD_EEPROM
Table 26-14
Minimum Wait Delay
4.5ms
5ms
10ms
10ms
MSB
MSB
before programming the next byte. See
for t
WD_FLASH
WD_FLASH
before programming the next page. As
value
ATmega128A
LSB
LSB
Table 26-14
CC
306
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