ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 73

MCU 8BIT 128K ISP FLASH 64-TQFP

ATMEGA128A-AU

Manufacturer Part Number
ATMEGA128A-AU
Description
MCU 8BIT 128K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4784435

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12.3.1
8151H–AVR–02/11
Alternate Functions of Port A
The Port A has an alternate function as the address low byte and data lines for the External
Memory Interface.
Table 12-2.
Table 12-3
shown in
Table 12-3.
Note:
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
1. ADA is short for ADdress Active and represents the time when address is output. See
Figure 12-6 on page
PA7/AD7
SRE
~(WR | ADA
PORTA7 • PUD
SRE
WR | ADA
SRE
A7 • ADA | D7
OUTPUT • WR
0
0
D7 INPUT
nal Memory Interface” on page 22
and
Port A Pins Alternate Functions
Overriding Signals for Alternate Functions in PA7:PA4
Table 12-4
Alternate Function
AD7 (External memory interface address and data bit 7)
AD6 (External memory interface address and data bit 6)
AD5 (External memory interface address and data bit 5)
AD4 (External memory interface address and data bit 4)
AD3 (External memory interface address and data bit 3)
AD2 (External memory interface address and data bit 2)
AD1 (External memory interface address and data bit 1)
AD0 (External memory interface address and data bit 0)
(1)
) •
relates the alternate functions of Port A to the overriding signals
71.
PA6/AD6
SRE
~(WR | ADA) •
PORTA6 • PUD
SRE
WR | ADA
SRE
A6 • ADA | D6
OUTPUT • WR
0
0
D6 INPUT
for details.
PA5/AD5
SRE
~(WR | ADA) •
PORTA5 • PUD
SRE
WR | ADA
SRE
A5 • ADA | D5
OUTPUT • WR
0
0
D5 INPUT
ATmega128A
PA4/AD4
SRE
~(WR | ADA) •
PORTA4 • PUD
SRE
WR | ADA
SRE
A4 • ADA | D4
OUTPUT • WR
0
0
D4 INPUT
“Exter-
73

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