ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 78

• Manufacturer Part Number: ATMEGA128A-AU
• Description: MCU 8BIT 128K ISP FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4784435

12.3.4
8151H–AVR–02/11
Alternate Functions of Port D
Table 12-10. Overriding Signals for Alternate Functions in PC3:PC0
Note:
The Port D pins with alternate functions are shown in
Table 12-11. Port D Pins Alternate Functions
Note:
The alternate pin configuration is as follows:
• T2 – Port D, Bit 7
T2, Timer/Counter2 counter source.
• T1 – Port D, Bit 6
T1, Timer/Counter1 counter source.
• XCK1 – Port D, Bit 5
XCK1, USART1 External clock. The Data Direction Register (DDD4) controls whether the clock
is output (DDD4 set) or input (DDD4 cleared). The XCK1 pin is active only when the USART1
operates in Synchronous mode.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
1. XMM = 0 in ATmega103 compatibility mode.
1. XCK1, TXD1, RXD1, SDA, and SCL not applicable in ATmega103 compatibility mode.
PC3/A11
SRE • (XMM<5)
0
SRE • (XMM<5)
1
SRE • (XMM<5)
A11
0
0
–
–
Alternate Function
T2 (Timer/Counter2 Clock Input)
T1 (Timer/Counter1 Clock Input)
XCK1
ICP1 (Timer/Counter1 Input Capture Pin)
INT3/TXD1
INT2/RXD1
INT1/SDA
INT0/SCL
(1)
(USART1 External Clock Input/Output)
(1)
(1)
(1)
(1)
(External Interrupt0 Input or TWI Serial CLock)
(External Interrupt1 Input or TWI Serial DAta)
(External Interrupt3 Input or UART1 Transmit Pin)
(External Interrupt2 Input or UART1 Receive Pin)
PC2/A10
SRE • (XMM<6)
0
SRE • (XMM<6)
1
SRE • (XMM<6)
A10
0
0
–
–
Table
PC1/A9
SRE • (XMM<7)
0
SRE • (XMM<7)
1
SRE • (XMM<7)
A9
0
0
–
–
12-11.
(1)
ATmega128A
PC0/A8
SRE • (XMM<7)
0
SRE • (XMM<7)
1
SRE • (XMM<7)
A8
0
0
–
–
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