ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 254

• Manufacturer Part Number: ATMEGA128A-AU
• Description: MCU 8BIT 128K ISP FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4784435

24.7
PRIVATE0; $8
PRIVATE1; $9
PRIVATE2; $A
PRIVATE3; $B
8151H–AVR–02/11
On-chip Debug Specific JTAG Instructions
A debugger, like the AVR Studio
nal purpose, leaving less flexibility to the end-user.
A list of the On-chip Debug specific JTAG instructions is given in
Instructions” on page
The JTAGEN fuse must be programmed to enable the JTAG Test Access Port. In addition, the
OCDEN fuse must be programmed and no Lock bits must be set for the On-chip Debug system
to work. As a security feature, the On-chip Debug system is disabled when any Lock bits are set.
Otherwise, the On-chip Debug system would have provided a back-door into a secured device.
The AVR Studio enables the user to fully control execution of programs on an AVR device with
On-chip Debug capability, AVR In-Circuit Emulator, or the built-in AVR Instruction Set Simulator.
AVR Studio supports source level execution of Assembly programs assembled with Atmel Cor-
poration’s AVR Assembler and C programs compiled with third party vendors’ compilers.
AVR Studio runs under Microsoft
For a full description of the AVR Studio, please refer to the AVR Studio User Guide found in the
Online Help in AVR Studio. Only highlights are presented in this document.
All necessary execution commands are available in AVR Studio, both on source level and on
disassembly level. The user can execute the program, single step through the code either by
tracing into or stepping over functions, step out of functions, place the cursor on a statement and
execute until the statement is reached, stop the execution, and reset the execution target. In
addition, the user can have an unlimited number of code break points (using the BREAK instruc-
tion) and up to two data memory break points, alternatively combined as a mask (range) break
point.
The On-chip debug support is considered being private JTAG instructions, and distributed within
ATMEL and to selected third-party vendors only. Instruction opcodes are listed for reference.
Private JTAG instruction for accessing On-chip Debug system.
Private JTAG instruction for accessing On-chip Debug system.
Private JTAG instruction for accessing On-chip Debug system.
Private JTAG instruction for accessing On-chip Debug system.
• 2 single Program Memory break points + 1 Program Memory break point with mask (“range
• 2 single Program Memory break points + 1 Data Memory break point with mask “range break
break point”)
point”.
254.
®
®
, may however use one or more of these resources for its inter-
Windows
®
95/98/2000 and Windows NT
“On-chip Debug Specific JTAG
ATmega128A
®
and Windows XP
254
®
.