ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 1128

IC MCU 32BIT 256KB FLSH 100TFBGA

ATSAM3U4CA-CU

Manufacturer Part Number
ATSAM3U4CA-CU
Description
IC MCU 32BIT 256KB FLSH 100TFBGA
Manufacturer
Atmel
Series
SAM3Ur
Datasheets

Specifications of ATSAM3U4CA-CU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
57
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b, 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
3xUSART, TWI, 4xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
57
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U4CA-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3U4CA-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
43.9.3.1
43.9.3.2
Table 43-46. SPI Timings
1128
Symbol
SPI
Master Write Mode
Master Read Mode
Slave Read Mode
Slave Write Mode
0
SAM3U Series
Maximum SPI Frequency
SPI Timings
Parameter
MISO Setup time before SPCK rises (master)
Figure 43-15. SPI Slave Mode with (CPOL = NCPHA = 0) or (CPOL= NCPHA= 1)
The following formulas give maximum SPI frequency in Master read and write modes and in
Slave read and write modes.
NPCS0
MISO
MOSI
SCK
The SPI is only sending data to a slave device such as an LCD, for example. The limit is
given by SPI
speed (see
pad.
T
DataFlash (AT45DB642D), T
In the formula above, F
In slave mode, SPCK is the input clock for the SPI. The max SPCK frequency is given by
setup and hold timings SPI
the pad limit, the limit in slave read mode is given by SPCK pad.
For 3.3V I/O domain and SPI6, F
before sampling data.
f
f
SPCK
SPCK
valid
is the slave time response to output data after detecting an SPCK edge. For Atmel SPI
Max
Max
=
=
Section 43.9.2 “I/O
2
SPI
--------------------------------------------------------
SPI
-------------------------------------------------------- -
SPI
(or SPI
15
0
6
(
(
orSPI
orSPI
5
) timing. Since it gives a maximum frequency above the maximum pad
SPCK
1
1
3
9
)
)
SPI
Max = 38.5 MHz @ VDDIO = 3.3V.
7
+
+
3.3V domain
1.8V domain
/SPI
valid
Conditions
T
T
9
valid
setup
Characteristics”), the max SPI frequency is the one from the
(orT
8
SPCK
(or SPI
SPI
v
Max = 33 MHz. T
10
) is 12 ns Max.
(1)
(2)
10
/SPI
11
SPI
). Since this gives a frequency well above
11
Min
14
17
setup
is the setup time from the master
Max
6430D–ATARM–25-Mar-11
SPI
Units
14
ns
ns

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