ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 365

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 25-12. WRITE_MODE = 0. The write operation is controlled by NCS
25.10.5
Table 25-6.
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
Coded Value
setup [5:0]
pulse [6:0]
cycle [8:0]
Coding Timing Parameters
Coding and Range of Timing Parameters
NWR0, NWR1
NBS0, NBS1,
A0, A1
D[15:0]
Number of Bits
A [23:2]
NWE,
MCK
NCS
All timing parameters are defined for one chip select and are grouped together in one
SMC_REGISTER according to their type.
Table 25-6
• The SMC_SETUP register groups the definition of all setup parameters: NRD_SETUP,
• The SMC_PULSE register groups the definition of all pulse parameters: NRD_PULSE,
• The SMC_CYCLE register groups the definition of all cycle parameters: NRD_CYCLE,
NCS_RD_SETUP, NWE_SETUP, NCS_WR_SETUP
NCS_RD_PULSE, NWE_PULSE, NCS_WR_PULSE
NWE_CYCLE
6
7
9
shows how the timing parameters are coded and their permitted range.
256 x cycle[8:7] + cycle[6:0]
128 x setup[5] + setup[4:0]
256 x pulse[6] + pulse[5:0]
Effective Value
Coded Value
0 ≤ cycle ≤ 127
0 ≤ setup ≤ 31
0 ≤ pulse ≤ 63
Permitted Range
SAM3U Series
SAM3U Series
Effective Value
256.. (256+127)
512.. (512+127)
768..(768+127)
128..(128+31)
256..(256+63)
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