ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 356

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

25.6
25.6.1
25.6.2
Figure 25-2. SMC Connections to Static Memory Devices
25.7
25.7.1
25.7.2
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Application Example
Product Dependencies
SAM3U Series
SAM3U Series
Implementation Examples
Hardware Interface
I/O Lines
Power Management
Static Memory
Controller
NWR1/NBS1
NWR0/NWE
A2 - A23
A0/NBS0
D0-D15
NCS0
NCS1
NCS2
NCS3
For Hardware implementation examples, refer to ATSAM3U-EK schematics which show exam-
ples of connection to an LCD module, PSRAM and NAND Flash.
The pins used for interfacing the Static Memory Controller are multiplexed with the PIO lines.
The programmer must first program the PIO controller to assign the Static Memory Controller
pins to their peripheral function. If I/O Lines of the SMC are not used by the application, they can
be used for other purposes by the PIO Controller.
The SMC is clocked through the Power Management Controller (PMC), thus the programmer
must first configure the PMC to enable the SMC clock.
A1
NWR0/NWE
NRD
D0 - D7
D0 - D7
CS
OE
WE
128K x 8
SRAM
A0 - A16
A2 - A18
NWR1/NBS1
D8-D15
NRD
OE
WE
D0-D7
CS
128K x 8
SRAM
A0 - A16
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
A2 - A18