ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 124

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.12.2
13.12.2.1
13.12.2.2
13.12.2.3
13.12.2.4
124
SAM3U Series
AND, ORR, EOR, BIC, and ORN
Syntax
Operation
Restrictions
Condition flags
Logical AND, OR, Exclusive OR, Bit Clear, and OR NOT.
where:
op
S
result of the operation, see
cond
Rd
Rn
Operand2
details of the options.
The AND, EOR, and ORR instructions perform bitwise AND, Exclusive OR, and OR operations
on the values in Rn and Operand2.
The BIC instruction performs an AND operation on the bits in Rn with the complements of the
corresponding bits in the value of Operand2.
The ORN instruction performs an OR operation on the bits in Rn with the complements of the
corresponding bits in the value of Operand2.
Do not use SP and do not use PC.
If S is specified, these instructions:
• update the N and Z flags according to the result
• can update the C flag during the calculation of Operand2, see
• do not affect the V flag.
page 96
op{S}{cond} {Rd,} Rn, Operand2
AND
ORR
EOR
BIC
ORN
is one of:
logical AND.
logical OR, or bit set.
logical Exclusive OR.
logical AND NOT, or bit clear.
logical OR NOT.
is an optional suffix. If S is specified, the condition code flags are updated on the
is an optional condition code, see
is the destination register.
is the register holding the first operand.
is a flexible second operand. See
“Conditional execution” on page
See “Conditional execution” on page
“Flexible second operand” on page 96
100.
“Flexible second operand” on
6430D–ATARM–25-Mar-11
100..
for