ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 1154

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1154
Doc.
Rev.
6430C
SAM3U Series
Overview:
Section 2. ”SAM3U Block
Section 5. ”Power
Section 3. ”Signal
Figure 5-1, “Single
Figure
not usable.
Section 5.5 ”Low Power
Table 5-1, “Low Power Mode Configuration
Table 11-2, “Multiplexing on PIO Controller A
Section 10.13 ”Chip Identification”
Table 10-2, “SAM3U Chip IDs Register - Revision A
Section 12.4 ”Universal Synchronous Asynchronous Receiver Transmitter
CHIP ID:
”ARCH: Architecture Identifier”
CORTEX:
Section 13.19 ”Nested Vectored Interrupt
signals.”
EFC:
Section 21.3.3.7 ”Unique
Figure 21-6, “Example of Partial Page Programming”
higher) boundaries...”
HSMCI:
Section 37.10 ”HSMCI Boot Operation
”SDCBUS: SDCard/SDIO Bus
Values, Names, Descriptions updated in bitfield description tables. (global)
Section 37.13.18 ”HSMCI Write Protect Mode
MATRIX:
Section 24.6.6 ”Write Protect Status
PMC:
“PMC Fast Startup Polarity
“PMC Clock Generator PLLA
Section 28.11 ”Programming Sequence”
options are available: main clock, slow clock, PLLACK and UPLLCK. By default, the clock source selected is
main clock.”
Section 28.10 ”Clock Failure
PWM:
Section 38.6.23 ”PWM Fault Mode
”PWM Fault Clear
updated.
Table 38-2, “I/O
Comments
5-1,
Figure
Lines”, new to datasheet.
Description”, USART signal DCD0 is an Input
Considerations”, fixed grammar in Voltage ranges.
5-2,
Register”,
Supply”, Main supply range is 1.8V-3.6V.
Figure
Modes”, stray references to WUPx pins, renamed WKUPx
Identifier”, Unique Identifier is located ... 0x80000-0x8000F.
Diagram”, changed orientation of block diagrams.
Register”, FSTPx: bitfield typo fixed.
Detector”, updated with new information.
Section 38.6.27 ”PWM Fault Protection Enable
Register”, removed STMODE bitfield.
5-3, updated “Note” below figures, “With Main Supply <2.0V USB and ADC are
Width”, bitfield table updated.
bit field updated with SAM3S, SAM3N identifiers. Bitfield tables reorganized.
Register”,
Register”, WPVS identified in bitfield description.
Mode”, added precision on boot from internal Flash.
Step
Controller”, text on 3rd bullet updated: “Level detection of interrupt
Summary”, updated footnote “5”.
(PIOA)”, TWD1 and TWCK1 only available on 144-pin version.
Section 38.6.24 ”PWM Fault Status
Register”, ASCI code is for MCI.
5 “Selection of Programmable
Parts”, added to datasheet.
text added below figure,..”works only with 128-bit (or
(USART)”...”SCK up to MCK/6”
Register”, bitfield descriptions
Clocks”, updated: “Four clock
Register”,
Section 38.6.25
6430D–ATARM–25-Mar-11
6711
6964
Change
Request
Ref.
rfo
6681
6698
6686
6951
rfo→ 7097
6967
6823
rfo
6827
6745
7125
rfo
6718
6688
6706
7128
6824
rfo