ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 995

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

• RX_SETUP/ERR_FL_ISO: Received SETUP/Error Flow Interrupt Enabled
0 = Received SETUP/Error Flow Interrupt is masked.
1 = Received SETUP/Error Flow Interrupt is enabled.
• STALL_SNT/ERR_CRISO/ERR_NBTRA: Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled
0 = Stall Sent/ISO CRC error/number of Transaction Error Interrupt is masked.
1 = Stall Sent /ISO CRC error/number of Transaction Error Interrupt is enabled.
• NAK_IN/ERR_FLUSH: NAKIN/Bank Flush Error Interrupt Enabled
0 = NAKIN Interrupt is masked.
1 = NAKIN/Bank Flush Error Interrupt is enabled.
• NAK_OUT: NAKOUT Interrupt Enabled
0 = NAKOUT Interrupt is masked.
1 = NAKOUT Interrupt is enabled.
• BUSY_BANK: Busy Bank Interrupt Enabled
0 = BUSY_BANK Interrupt is masked.
1 = BUSY_BANK Interrupt is enabled.
• SHRT_PCKT: Short Packet Interrupt Enabled
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
For OUT endpoints: an interrupt is sent when all banks are busy.
For IN endpoints: an interrupt is sent when all banks are free.
For OUT endpoints: send an Interrupt when a Short Packet has been received.
0 = Short Packet Interrupt is masked.
1 = Short Packet Interrupt is enabled.
For IN endpoints: a Short Packet transmission is guaranteed upon end of the DMA Transfer, thus signaling a BULK or
INTERRUPT end of transfer or an end of isochronous (micro-)frame data, but only if the UDPHS_DMACONTROLx
register END_B_EN and UDPHS_EPTCTLx register AUTO_VALID bits are also set.
SAM3U Series
SAM3U Series
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