ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 671

IC MCU 32BIT 256KB FLSH 100TFBGA

ATSAM3U4CA-CU

Manufacturer Part Number
ATSAM3U4CA-CU
Description
IC MCU 32BIT 256KB FLSH 100TFBGA
Manufacturer
Atmel
Series
SAM3Ur
Datasheets

Specifications of ATSAM3U4CA-CU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
57
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b, 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
3xUSART, TWI, 4xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
57
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U4CA-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3U4CA-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Figure 34-10. Transmitter Control
34.4.4
34.4.5
6430D–ATARM–25-Mar-11
Shift Register
UART_THR
TXEMPTY
TXRDY
UTXD
Peripheral DMA Controller
Test Modes
in UART_THR
Write Data 0
S
Data 0
in UART_THR
Both the receiver and the transmitter of the UART are connected to a Peripheral DMA Controller
(PDC) channel.
The peripheral data controller channels are programmed via registers that are mapped within
the UART user interface from the offset 0x100. The status bits are reported in the UART status
register (UART_SR) and can generate an interrupt.
The RXRDY bit triggers the PDC channel data transfer of the receiver. This results in a read of
the data in UART_RHR. The TXRDY bit triggers the PDC channel data transfer of the transmit-
ter. This results in a write of data in UART_THR.
The UART supports three test modes. These modes of operation are programmed by using the
field CHMODE (Channel Mode) in the mode register (UART_MR).
The Automatic Echo mode allows bit-by-bit retransmission. When a bit is received on the URXD
line, it is sent to the UTXD line. The transmitter operates normally, but has no effect on the
UTXD line.
The Local Loopback mode allows the transmitted characters to be received. UTXD and URXD
pins are not used and the output of the transmitter is internally connected to the input of the
receiver. The URXD pin level has no effect and the UTXD line is held high, as in idle state.
The Remote Loopback mode directly connects the URXD pin to the UTXD line. The transmitter
and the receiver are disabled and have no effect. This mode allows a bit-by-bit retransmission.
Write Data 1
Data 0
Data 0
P
stop
S
Data 1
Data 1
P
SAM3U Series
Data 1
stop
671

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