ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 503

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

30. Parallel Input/Output Controller (PIO)
30.1
30.2
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
Description
Embedded Characteristics
The Parallel Input/Output Controller (PIO) manages up to 32 fully programmable input/output
lines. Each I/O line may be dedicated as a general-purpose I/O or be assigned to a function of
an embedded peripheral. This assures effective optimization of the pins of a product.
Each I/O line is associated with a bit number in all of the 32-bit registers of the 32-bit wide User
Interface.
Each I/O line of the PIO Controller features:
The PIO Controller also features a synchronous output providing up to 32 bits of data output in a
single write operation.
• An input change interrupt enabling level change detection on any I/O line.
• Additional Interrupt modes enabling rising edge, falling edge, low level or high level detection
• A glitch filter providing rejection of glitches lower than one-half of system clock cycle.
• A debouncing filter providing rejection of unwanted pulses from key or push button
• Multi-drive capability similar to an open drain I/O line.
• Control of the pull-up of the I/O line.
• Input visibility and output control.
• Up to 32 Programmable I/O Lines
• Fully Programmable through Set/Clear Registers
• Multiplexing of Two Peripheral Functions per I/O Line
• For each I/O Line (Whether Assigned to a Peripheral or Used as General Purpose I/O)
• Synchronous Output, Provides Set and Clear of Several I/O lines in a Single Write
on any I/O line.
operations.
– Input Change Interrupt
– Programmable Glitch Filter
– Programmable Debouncing Filter
– Multi-drive Option Enables Driving in Open Drain
– Programmable Pull Up on Each I/O Line
– Pin Data Status Register, Supplies Visibility of the Level on the Pin at Any Time
– Additional Interrupt Modes on a Programmable Event: Rising Edge, Falling Edge,
– Lock of the Configuration by the Connected Peripheral
Low Level or High Level
SAM3U Series
SAM3U Series
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