ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 961

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 39-12. Data OUT Transfer for Endpoint with One Bank
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
USB Bus
Packets
RX_BK_RDY
(UDPHS_EPTSTAx)
FIFO (DPR)
Content
Token OUT
Host Sends Data Payload
Written by UDPHS Device
For OUT transfer, the bank will be automatically cleared by hardware when the application has
read all the bytes in the bank (the bank is empty).
Notes:
Data OUT 1
Data OUT 1
– END_TR_IT: End of transfer interrupt enable, an interrupt is sent after the last USB
– CHANN_ENB: Run and stop at end of buffer.
packet has been transferred by the DMA, if the USB transfer ended with a short
packet. (Beneficial when the receive size is unknown.)
1. When a zero-length-packet is received, RX_BK_RDY bit in UDPHS_EPTSTAx is cleared auto-
2. If the host sends a zero-length packet, and the endpoint is free, then the device sends an ACK.
matically by AUTO_VALID, and the application knows of the end of buffer by the presence of
the END_TR_IT.
No data is written in the endpoint, the RX_BY_RDY interrupt is generated, and the
BYTE_COUNT field in UDPHS_EPTSTAx is null.
Host Sends the Next Data Payload
Microcontroller Read
ACK
Set by Hardware
Microcontroller Transfers Data
Data OUT 1
Token OUT
Interrupt Pending
Data OUT 2
NAK
Cleared by Firmware,
Data Payload Written in FIFO
Token OUT
Host Resends the Next Data Payload
Written by UDPHS Device
Data OUT 2
Data OUT 2
SAM3U Series
SAM3U Series
ACK
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