ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 1150

IC MCU 32BIT 256KB FLSH 100TFBGA

ATSAM3U4CA-CU

Manufacturer Part Number
ATSAM3U4CA-CU
Description
IC MCU 32BIT 256KB FLSH 100TFBGA
Manufacturer
Atmel
Series
SAM3Ur
Datasheets

Specifications of ATSAM3U4CA-CU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
57
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b, 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
3xUSART, TWI, 4xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
57
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U4CA-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3U4CA-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
46.2
46.2.1
46.2.1.1
46.2.1.2
46.2.1.3
46.2.2
46.2.2.1
1150
SAM3U Errata - Rev. A Parts
SAM3U Series
Flash
12-bit Analog-to-Digital Converter (ADC12B)
Flash: Issue Running at Frequency Lower than 2.5 MHz
Flash: Read Flash in 64-bit Mode
Flash: Flash Programming
ADC12B: Current Consumption in Backup Mode on VDDANA
Revision A parts Chip IDs are as follows:
SAM3U4C (Rev A)
SAM3U2C (Rev A)
SAM3U1C (Rev A)
SAM3U4E (Rev A)
SAM3U2E (Rev A)
SAM3U1E (Rev A)
Refer also to
When the system clock (MCK) is lower than 2.5 MHz with 2 Wait States (WS) programmed in
the EEFC Flash Mode Register (EEFC_FMR), the Cortex fetches erroneous instructions.
Do not use 2 WS when running at a frequency lower than 2.5 MHz.
Higher than expected power consumption can be seen when reading Flash in 64-bit mode.
Use 128-bit mode instead.
When writing data into the Flash memory plane (either through the EEFC, using the IAP func-
tion, or FFPI), the data may not be correctly written (i.e the data written is not the one expected).
Set the number of Wait States (WS) to 6 (FWS=6) during the programming.
In Backup mode, the current consumption on VDDANA is around 1.0 mA instead of 0.1 μA
Four workarounds are possible:
1. Do not supply VDDANA and VDDIO in Backup mode using an external switch managed
2. Do not supply VDDANA in Backup mode using an external switch managed by the
3. Do not supply VDDANA in Backup mode using an external switch managed by any PIO
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
by SHDN pin.
SHDN and set all PIOs with ADC inputs (PA22, PA30, PB3-PB8, PC15-PC18, PC28-
C21) at low level (either externally or by software).
and set all PIOs with ADC inputs (PA22, PA30, PB3-PB8, PC15-PC18, PC28-C21) at
low level (either externally or by software). Since the PIO state is preserved when in
backup mode, any free PIO line can be used to switch off the external switch by driving
the PIO line at low level (PIO is input, pull-up enabled after backup reset).
Section 46.1 “Marking” on page 1149
0x28000961
0x280A0761
0x28090561
0x28100961
0x281A0761
0x28190561
6430D–ATARM–25-Mar-11

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