ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 1141

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

43.9.8
Table 30 describes the requirements for devices connected to the Two-wire Serial Bus. For timing symbols refer to
43-30.
Table 43-53. Two-wire Serial Bus Requirements
Note:
6430D–ATARM–25-Mar-11
Symbol
V
V
V
V
t
t
C
f
Rp
t
t
t
t
t
t
t
t
r
of
TWCK
LOW
HIGH
HD;STA
SU;STA
HD;DAT
SU;DAT
SU;STO
HD;STA
IL
IH
hys
OL
i
(1)
1. Required only for f
2. C
3.
4.
5. T
Two-wire Serial Interface Characteristics
The TWCK low Period is defined as follow:
The TWCK high period is defined as follows:
Parameter
Input Low-voltage
Input High-voltage
Hysteresis of Schmitt Trigger Inputs
Output Low-voltage
Rise Time for both TWD and TWCK
Output Fall Time from V
Capacitance for each I/O Pin
TWCK Clock Frequency
Value of Pull-up resistor
Low Period of the TWCK clock
High period of the TWCK clock
Hold Time (repeated) START Condition
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Hold Time (repeated) START Condition
CP_MCK
b
= capacitance of one bus line in pF. Per I2C Standard compatibility, C
= MCK Bus Period.
TWCK
> 100 kHz.
IHmin
to V
ILmax
T
low
T
high
=
(
=
(
CLDIV
10 pF < C
(
3 mA sink current
(
f
f
f
f
f
f
f
f
f
CHDIV
f
f
f
f
f
f
f
f
f
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
TWCK
Figure 43-30
Condition
×
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
≤ 100 kHz
≤ 100 kHz
≤ 100 kHz
≤ 100 kHz
≤ 100 kHz
≤ 100 kHz
≤ 100 kHz
≤ 100 kHz
≤ 100 kHz
2
b
×
CKDIV
< 400 pF
2
CKDIV
)
+
)
b
4 )
+
Max = 400pF
×
4 )
T
×
MCK
T
20 + 0.1C
20 + 0.1C
V
------------------------------------- -
MCK
V
------------------------------------- -
VDDIO
0.7xV
VDDIO
t
t
T
T
LOW -
LOW -
0.150
CP_MCK
CP_MCK
3mA
t
t
t
t
t
t
t
t
-0.3
Min
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
3mA
(3)
(3)
(4)
(4)
–
0
0
0
-
VDDIO
–
3 x
3 x
–
b
b
0,4V
(1)(2)
(1)(2)
0,4V
SAM3U Series
3 x T
3 x T
0.3 V
V
1000ns
------------------ -
CC
300ns
--------------- -
Max
300
250
400
0.4
C
10
C
CP_MCK
CP_MCK
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
+ 0.3
VDDIO
b
b
Figure
Units
kHz
1141
pF
ns
ns
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
ns
ns
μs
μs
μs
μs
V
V
V
V
Ω
Ω