IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 333
![IP CORE - PCI Express X1 And X4 Lanes For Arria GX](/photos/24/19/241936/4696145_sml.jpg)
IP-AGX-PCIE/4
Manufacturer Part Number
IP-AGX-PCIE/4
Description
IP CORE - PCI Express X1 And X4 Lanes For Arria GX
Manufacturer
Altera
Datasheet
1.IP-AGX-PCIE1.pdf
(362 pages)
Specifications of IP-AGX-PCIE/4
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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Chapter :
Incremental Compile Module for Descriptor/Data Examples
December 2010 Altera Corporation
ICM Features
ICM Functional Description
1
The ICM is provided for backward compatibility only. New designs using the
Avalon-ST interface should use the Avalon-ST PCI Express MegaCore instead.
Figure B–23. Design Example with ICM
The ICM provides the following features:
■
■
■
■
■
This section describes details of the ICM within the following topics:
■
■
■
■
A fully registered boundary to the application to support design partitioning for
incremental compilation
An Avalon-ST protocol interface for the application at the RX, TX, and interrupt
(MSI) interfaces for designs using the Avalon-ST interface
Optional filters and ACK’s for PCI Express message packets received from the
transaction layer
Maintains packet ordering between the TX and MSI Avalon-ST interfaces
TX bypassing of non-posted PCI Express packets for deadlock prevention
“<variation_name>_icm Partition”
“ICM Block Diagram”
“ICM Files”
“ICM Application-Side Interface”
Stratix IV, Stratix III, Stratix II, Stratix II GX, Cyclone II,
Cyclone III, Arria GX, or Stratix GX Device
Function - Desc/Data IF
PCI Express MegaCore
<variation_name> _icm
PCI Express Link
User Application
Chaining DMA/
Endpoint
ICM
PCI Express Compiler User Guide
B–27
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