EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 300
![IC STRATIX FPGA 10K LE 780-FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP1S10F780I6N
Manufacturer Part Number
EP1S10F780I6N
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S10F780I6N
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F780I6N
Manufacturer:
ALTERA
Quantity:
3 000
- Current page: 300 of 864
- Download datasheet (11Mb)
Contents
Chapter 7. Implementing High Performance DSP Functions
in Stratix & Stratix GX Devices
Section V. IP & Design Considerations
viii
Operational Modes .............................................................................................................................. 6–18
Software Support ................................................................................................................................. 6–28
Conclusion ............................................................................................................................................ 6–28
Introduction ............................................................................................................................................ 7–1
Stratix & Stratix GX DSP Block Overview ......................................................................................... 7–1
TriMatrix Memory Overview .............................................................................................................. 7–4
DSP Function Overview ....................................................................................................................... 7–5
Finite Impulse Response (FIR) Filters ................................................................................................. 7–5
Infinite Impulse Response (IIR) Filters ............................................................................................. 7–34
Matrix Manipulation ........................................................................................................................... 7–45
Discrete Cosine Transform (DCT) ..................................................................................................... 7–52
Arithmetic Functions ........................................................................................................................... 7–59
Conclusion ............................................................................................................................................ 7–62
References ............................................................................................................................................. 7–63
Revision History ..................................................................................................................... Section V–1
Multiplier Block ................................................................................................................................ 6–5
Adder/Output Block ....................................................................................................................... 6–9
Routing Structure & Control Signals ........................................................................................... 6–12
Simple Multiplier Mode ................................................................................................................ 6–18
Multiply Accumulator Mode ........................................................................................................ 6–22
Two-Multiplier Adder Mode ........................................................................................................ 6–23
Four-Multiplier Adder Mode ....................................................................................................... 6–24
FIR Filter Background ...................................................................................................................... 7–6
Basic FIR Filter .................................................................................................................................. 7–7
Time-Domain Multiplexed FIR Filters ........................................................................................ 7–13
Polyphase FIR Interpolation Filters ............................................................................................. 7–17
Polyphase FIR Decimation Filters ................................................................................................ 7–24
Complex FIR Filter ......................................................................................................................... 7–31
IIR Filter Background .................................................................................................................... 7–34
Basic IIR Filters ............................................................................................................................... 7–36
Butterworth IIR Filters ................................................................................................................... 7–39
Background on Matrix Manipulation .......................................................................................... 7–45
Two-Dimensional Filtering & Video Imaging ........................................................................... 7–46
DCT Background ............................................................................................................................ 7–52
2-D DCT Algorithm ....................................................................................................................... 7–53
Background ..................................................................................................................................... 7–59
Arithmetic Function Implementation ......................................................................................... 7–60
Arithmetic Function Implementation Results ............................................................................ 7–62
Arithmetic Function Design Example ......................................................................................... 7–62
Stratix Device Handbook, Volume 2
Altera Corporation
Related parts for EP1S10F780I6N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-25T](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: