EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 484
EP1S10F780I6N
Manufacturer Part Number
EP1S10F780I6N
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S10F780I6N
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F780I6N
Manufacturer:
ALTERA
Quantity:
3 000
- Current page: 484 of 864
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Principles of SERDES Operation
Figure 5–7. Stratix Programmable Transmitter Clock
5–12
Stratix Device Handbook, Volume 2
Logic Array
Stratix
SDR Transmitter Clock Output
You can route the high-frequency clock internally generated by the PLL
out as a transmitter clock output on any of the differential channels. The
high-frequency clock output allows Stratix devices to support
applications that require a 1-to-1 relationship between the clock and data.
The path of the high-speed clock is shown in
inverter allows you to drive the signal out on either the negative edge of
the clock or 180º out of phase with the streaming data.
Transmitter Circuit
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD0
PD1
Fast
PLL
Register
Parallel
TXLOADEN
× W
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
Register
Serial
Figure
5–8. A programmable
Altera Corporation
TXOUT+
TXOUT−
July 2005
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