EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 696
EP1S10F780I6N
Manufacturer Part Number
EP1S10F780I6N
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S10F780I6N
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Part Number:
EP1S10F780I6N
Manufacturer:
ALTERA
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TriMatrix Memory
10–12
Stratix Device Handbook, Volume 2
always output a don’t care value.
through behavior of the mixed-port mode. You can use the altsyncram
megafunction to set the output behavior during mixed-port read-during-
write mode.
Figure 10–7. Mixed-Port Feed-Through Behavior (OLD_DATA)
Note to
(1)
Figure 10–8. Mixed-Port Feed-Through Behavior (DONT_CARE)
Note to
(1)
Memory Megafunctions
To convert RAM and ROM originally targeting the APEX II or APEX 20K
architecture to Stratix or Stratix GX memory, specify Stratix or Stratix GX
as the target family in the MegaWizard Plug-In Manager. The software
Figures 10–7
the outputs are not registered.
Figures 10–7
the outputs are not registered.
Figure
Figure
10–7:
10–8:
address A and
address A and
and
and
address B
address B
data_out
data_out
10–8
10–8
data_in
data_in
inclock
inclock
Port A
Port A
Port B
Port B
Port A
Port A
Port B
Port B
wren
wren
wren
wren
assume that the address stays constant throughout and that
assume that the address stays constant throughout and that
A
A
Unknown
Old
Figures 10–7
Address Q
Address Q
A
B
B
and
10–8
B
B
Altera Corporation
show the feed-
Note (1)
Note (1)
July 2005
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