EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 818

• Manufacturer Part Number: EP1S10F780I6N
• Description: IC STRATIX FPGA 10K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F780I6N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 426
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Using Enhanced Configuration Devices
12–40
Stratix Device Handbook, Volume 2
addresses. With this information, Quartus II ensures that the partial POF
only updates the flash region containing the application configuration.
The factory configuration (page 0) and configuration option bits are left
unaltered during this process. The only exception is when a new
application configuration is added, the configuration options bits are
updated to include start/end addresses for the new page. All existing
page addresses and other configuration options bits remain unchanged.
Figure 12–23
programming file to replace the most recent application configuration. In
this example, the initial programming file contained one factory and two
application configurations. Hence, the page 2 application configuration is
being updated with new data.
1.
2.
3.
4.
5.
6.
7.
8.
Open the Convert Programming Files window from the File menu.
Select Programmer Object File for Remote Update (*.pof) from the
drop-down list titled Programming file type, and specify an output
file name.
In the Input files to convert box, highlight POF Data and click Add
File. Select the initial programming POF file for this design and
insert it.
In the Input files to convert box, highlight SOF Data and click Add
File. Select the new application configuration bitstream (SOF) and
insert it.
When using block addressing, select the SOF Data entry for Page 2,
and click Properties. This opens the SOF Data Properties dialog
box (see
Pick Block from the Address Mode drop down selection, and enter
32-bit Hexadecimal byte address for block Starting Address and
Ending Address. These addresses should be identical to those used
to generate the initial programming file. Click OK to save SOF data
properties.
Check the Memory Map File box to generate a memory map output
file that specifies the start/end addresses of the new application
configuration data in page 1.
Pick a remote update difference file from the Remote/Local Update
Difference File drop-down menu. You can select between an Intel
HEX, JAM, JBC, and POF output file types. The output file name is
the same as the POF output file name with a _dif suffix.
and the following steps illustrate generation of a partial
Figure 12–24 on page
12–42).
Altera Corporation
September 2004