MPC8379EVRAJF Freescale Semiconductor, MPC8379EVRAJF Datasheet - Page 125

• Manufacturer Part Number: MPC8379EVRAJF
• Description: MPU PWRQUICC II 533MHZ 689TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8379EVRAJF

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 533MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 689-TePBGA II
• Maximum Clock Frequency: 533 MHz
• Operating Supply Voltage: 1.8 V to 2.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 533MHz
• Embedded Interface Type: DUART, HSSI, I2C, IPIC, JTAG, SPI, USB
• Digital Ic Case Style: BGA
• No. Of Pins: 689
• Rohs Compliant: Yes
• For Use With: MPC8377E-RDBA - BOARD REF DES MPC8377 REV 2.1MPC8377E-MDS-PB - BOARD MODULAR DEV SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Revision
1
0
02/2009 • In
12/2008 Initial public release.
Date
• In
• In
• In
• In
• In
• In
• Updated part numbering information in AF column in
• In
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
rows for SerDes. In addition, changed 666 to 667 MHz.
MHz.
DDR2 SDRAM Output AC Timing Specifications,” and
footnote to references to MVREF, MDQ, and MDQS, referencing AN3665, MPC837xE Design Checklist.
footnote 10 and added footnote 14.
addition, modified extended temperature information in notes 1 and 4.
Table
Table
Table
Table
Table
Table
Table
Table
13, “DDR2 SDRAM DC Electrical Characteristics for GV
3, “Recommended Operating Conditions,” added two new rows for 800 MHz, and created two
5, “MPC8378E Power Dissipation
21, updated t
72, “TePBGA II Pinout Listing,” added footnote to USBDR_STP_SUSPEND and modified
74, “Operating Frequencies for TePBGA II,” changed 667 to 800 MHz for core_clk.
80, “Example Clock Frequency Combinations,” added 800 MHz cells for e300 core.
85, “Available Parts (Core/DDR Data Rate),” added new row for 800/400 MHz.
Table 87. Document Revision History (continued)
DDKHCX
minimum value for 333 MHz to 2.40.
Substantive Change(s)
1
,” added Notes 4 and 5. In addition, changed 666 to 667
Table
Table
84, “Part Numbering Nomenclature.” In
72, “TePBGA II Pinout Listing,” added
DD
(typ) = 1.8 V,”
Document Revision History
Table
21, “DDR1 and
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