MPC8379EVRAJF Freescale Semiconductor, MPC8379EVRAJF Datasheet - Page 19

MPU PWRQUICC II 533MHZ 689TEPBGA

MPC8379EVRAJF

Manufacturer Part Number
MPC8379EVRAJF
Description
MPU PWRQUICC II 533MHZ 689TEPBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8379EVRAJF

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
533MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
689-TePBGA II
Maximum Clock Frequency
533 MHz
Operating Supply Voltage
1.8 V to 2.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
533MHz
Embedded Interface Type
DUART, HSSI, I2C, IPIC, JTAG, SPI, USB
Digital Ic Case Style
BGA
No. Of Pins
689
Rohs Compliant
Yes
For Use With
MPC8377E-RDBA - BOARD REF DES MPC8377 REV 2.1MPC8377E-MDS-PB - BOARD MODULAR DEV SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8379EVRAJF
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC8379EVRAJF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table 20
6.2.2
Table 21
Freescale Semiconductor
Controller skew for MDQS-MDQ/MECC/MDM
Note:
1
2
3
MCKn cycle time, MCKn/MCKn crossing
ADDR/CMD output setup with respect to MCK
ADDR/CMD output hold with respect to MCK
MCSn output setup with respect to MCK
MCSn output hold with respect to MCK
MCK to MDQS skew
t
be captured with MDQSn. This should be subtracted from the total timing budget.
The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called t
determined by the following equation: t
absolute value of t
This specification applies only to DDR2 interface.
CISKEW
provides the input AC timing specifications for the DDR1 and DDR2 SDRAM interface.
shows the DDR1 and DDR2 SDRAM output AC timing specifications.
represents the total amount of skew consumed by the controller between MDQSn and any corresponding bit that will
DDR1 and DDR2 SDRAM Output AC Timing Specifications
Parameter
Parameter
CISKEW
Table 21. DDR1 and DDR2 SDRAM Output AC Timing Specifications
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Table 20. DDR1 and DDR2 SDRAM Input AC Timing Specifications
.
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
400 MHz data rate
333 MHz data rate
266 MHz data rate
DISKEW
= ±[T/4 – |t
Symbol
t
t
t
t
t
DDKHMH
DDKHCS
DDKHCX
DDKHAS
DDKHAX
Symbol
t
CISKEW
t
MCK
CISKEW
1
|] where T is the MCK clock period and |t
–500
–750
–750
Min
1.95
2.40
3.15
4.20
1.95
2.40
3.15
4.20
1.95
2.40
3.15
4.20
1.95
2.40
3.15
4.20
–0.6
Min
5
Max
500
750
750
Max
0.6
10
DISKEW
DDR1 and DDR2 SDRAM
Unit
. This can be
ps
CISKEW
Unit
ns
ns
ns
ns
ns
ns
| is the
Notes
Notes
1, 2
3, 7
3, 7
4, 8
3
2
3
3
19

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