MC68360CAI25L Freescale Semiconductor, MC68360CAI25L Datasheet - Page 206
MC68360CAI25L
Manufacturer Part Number
MC68360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
4.MC68360CAI25L.pdf
(24 pages)
Specifications of MC68360CAI25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Controller Family/series
68K
Core Size
32 Bit
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
Supply Voltage Range
3V To 3.6V, 4.75V To 5.25V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68360CAI25L
Manufacturer:
SAMTEC
Quantity:
1 000
Company:
Part Number:
MC68360CAI25L
Manufacturer:
FREESCAL
Quantity:
717
Company:
Part Number:
MC68360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68360CAI25L
Manufacturer:
FREESCALE
Quantity:
20 000
- MC68EN360VR25L PDF datasheet
- MC68EN360VR25L PDF datasheet #2
- MC68360AI25L PDF datasheet #3
- MC68360CAI25L PDF datasheet #4
- Current page: 206 of 962
- Download datasheet (4Mb)
CPU32+
.
The serial data word is 17 bits wide—16 data bits and a status/control (S/C) bit.
Bit 16 indicates the status of CPU-generated messages as listed in Table 5-21
Command and data transfers initiated by the development system should clear bit 16. The
current implementation ignores this bit; however, Motorola reserves the right to use this bit
for future enhancements.
5-64
S/C
16
15
• LOAD: NOT READY/ RESPONSE
• PERFORM COMMAND
• STORE RESULTS
• ASSERT FREEZE SIGNAL
• WAIT FOR COMMAND
Encoding
EXECUTE COMMAND
CPU32 ACTIVITY
0
0
1
1
1
ENTER (BDM)
Figure 5-21. BDM Command Execution Flowchart
Table 5-21. CPU Generated Message Encoding
Freescale Semiconductor, Inc.
FFFF
FFFF
Data
0000
0001
xxxx
For More Information On This Product,
MC68360 USER’S MANUAL
Valid Data Transfer
Command Complete; Status OK
Not Ready with Response; Come Again
BERR Terminated Bus Cycle; Data Invalid
Illegal Command
Go to: www.freescale.com
"NOT READY"
IF RESULTS =
CONTINUE
NO
DATA FIELD
Message Type
YES
DEVELOPMENT SYSTEM ACTIVITY
READ RESULTS/NEW COMMAND
• LOAD COMMAND REGISTER
• ENABLE SHIFT CLOCK
• SHIFT OUT 17 BITS
• DISABLE SHIFT CLOCK
• LOAD COMMAND REGISTER
• ENABLE SHIFT CLOCK
• SHIFT IN/OUT 17 BITS
• DISABLE SHIFT CLOCK
• READ RESULT REGISTER
SEND INITIAL COMMAND
0
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