MC68360CAI25L Freescale Semiconductor, MC68360CAI25L Datasheet - Page 372
MC68360CAI25L
Manufacturer Part Number
MC68360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
4.MC68360CAI25L.pdf
(24 pages)
Specifications of MC68360CAI25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Controller Family/series
68K
Core Size
32 Bit
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
Supply Voltage Range
3V To 3.6V, 4.75V To 5.25V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
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Price
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MC68360CAI25L
Manufacturer:
FREESCAL
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Quantity:
10 000
Part Number:
MC68360CAI25L
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FREESCALE
Quantity:
20 000
- MC68EN360VR25L PDF datasheet
- MC68EN360VR25L PDF datasheet #2
- MC68360AI25L PDF datasheet #3
- MC68360CAI25L PDF datasheet #4
- Current page: 372 of 962
- Download datasheet (4Mb)
IDMA Channels
IDMA channel 1 initialization required for this example:
7.6.4.6.2 Single Address Mode (Flyby Transfers). Each IDMA channel can be indepen-
dently programmed to provide single address transfers. Figure 7-14 illustrates a transfer
from memory to a peripheral. The DHR is not used by the IDMA, since the transfer occurs
directly from a device to memory. This mode is often referred to as "flyby" mode because
the DHR is not used.
7-48
• ICCR = $0720. Recommended normal configuration.
• FCR1 = $89. Source function code is 1000; destination function code is 1001.
• SAPR1 = $00000002. Source address.
• DAPR1 = $20000002. Destination address.
• BCR1 = $00000008. Byte transfer count.
• CSR1 = $FF. Clear any CSR bits that are currently set.
• CMAR1 = $00. Disable interrupts for this example.
• CMR1 = $4711. Internal maximum transfer rate; starts IDMA.
Bus Access #
10
11
1
2
3
4
5
6
7
8
9
Figure 7-14. Single Address Transfer Example
Freescale Semiconductor, Inc.
QUICC
Address (Hex)
IDMA
For More Information On This Product,
$00000002
$20000002
$20000003
$00000004
$20000004
$20000005
$20000006
$20000007
$00000008
$20000008
$20000009
MC68360 USER’S MANUAL
Go to: www.freescale.com
ADDR.
DACKx
JUST ONE BUS CYCLE
REQUIRED
Operation
DATA
BUS
Read
Write
Write
Read
Write
Write
Write
Write
Read
Write
Write
1
1
No. Bytes
2
1
1
4
1
1
1
1
2
1
1
PERIPHERAL
MEMORY
No. Bytes in DHR
2
1
0
4
3
2
1
0
2
1
0
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