MC68360CAI25L Freescale Semiconductor, MC68360CAI25L Datasheet - Page 328

• Manufacturer Part Number: MC68360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• Supply Voltage Range: 3V To 3.6V, 4.75V To 5.25V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

RISC Controller
The RISC controller has an option to execute microcode from a portion of user RAM, located
in the on-chip dual-port RAM. In this mode, either 512 bytes or 1024 bytes of the user RAM
cannot be accessed by the host or another bus master and are used exclusively by the
RISC. In this mode, the RISC controller can fetch instructions from both the dual-port RAM
and its private ROM. This mode allows Motorola to add new protocols or enhancements to
the QUICC in the form of Motorola-supplied RAM microcodes. The binary microcode is
obtained from Motorola and then loaded by the user into the dual-port RAM.
The RISC controller contains one configuration register described in the following para-
graph.
7.1.1 RISC Controller Configuration Register (RCCR)
The 16-bit, memory-mapped, read-write RCCR is used to configure the RISC processor and
controls the RISC internal timer. This register is initialized to zero at reset. Bits 0-7 should
not be modified unless the user is downloading a Motorola-supplied RAM microcode pack-
age..
TIME—Timer Enable
Bit 14—Reserved
TIMEP—Timer Period
7-4
TIME
15
8. CC3 Rx
9. SCC3 Tx
10. SCC4 Rx
11. SCC4 Tx
12. SMC1 Rx
13. SMC1 Tx
14. SMC2 Rx
15. SMC2 Tx
16. SPI Rx
17. SPI Tx
18. PIP
19. RISC Timer Tables
This bit enables the RISC controller internal timer. The timer will generate a tick to the
RISC based on the value programmed into the TIMEP bit. TIME may be modified at any
time to start or stop the scanning of the RISC timer tables.
This field controls the RISC controller timer tick. The RISC timer tables are scanned on
each timer tick. The input to this timer tick generator is the general system clock divided
by 1024. The formula is (TIMEP + 1) 1024 = (general system clock period). Thus, a val-
14
—
13
12
11
Freescale Semiconductor, Inc.
TIMEP
For More Information On This Product,
10
MC68360 USER’S MANUAL
Go to: www.freescale.com
9
8
7
6
5
RESERVED
4
3
2
1
0