MC68360CAI25L Freescale Semiconductor, MC68360CAI25L Datasheet - Page 854

IC MPU QUICC 25MHZ 240-FQFP

MC68360CAI25L

Manufacturer Part Number
MC68360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Controller Family/series
68K
Core Size
32 Bit
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
Supply Voltage Range
3V To 3.6V, 4.75V To 5.25V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68360CAI25L
Manufacturer:
SAMTEC
Quantity:
1 000
Part Number:
MC68360CAI25L
Manufacturer:
FREESCAL
Quantity:
717
Part Number:
MC68360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68360CAI25L
Manufacturer:
FREESCALE
Quantity:
20 000
Electrical Characteristics
10-42
(OUTPUT)
DSACK1,0
(OUTPUT)
NOTE: Two wait states are inserted when writing to the SIM. Three wait states are inserted when writing to the dual-
(INPUT)
(INPUT)
(INPUT)
(INPUT)
D31–D0
(INPUT)
(INPUT)
A31–A0
MBARE
CLKO1
R/W
DS
AS
port RAM and CPM. Four wait states are inserted when writing the SI RAM. Additional wait states may be
inserted when the SHEN1–SHEN0 = 10 and one of the internal masters is accessing an internal peripheral.
Figure 10-31. External MC68030/MC68360 Internal Synchronous
This figure represents an IACK cycle for both vectored and au-
tovectored interrupt. If IACK is for a vectored interrupt, AVECO
will not be driven. If IACK is an autovector interrupt, DSACK0-1
and data bus will not be driven.
150
S0
152
Freescale Semiconductor, Inc.
S1
For More Information On This Product,
155
Write Cycle Timing Diagram
S2
185
180
MC68360 USER’S MANUAL
182
Go to: www.freescale.com
S3
Sw
NOTE
Sw
2–4 CLOCKS
187
161
Sw
Sw
183
181
S4
S5
188
162
153
186
S0
163

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