MC68360CAI25L Freescale Semiconductor, MC68360CAI25L Datasheet - Page 632

IC MPU QUICC 25MHZ 240-FQFP

MC68360CAI25L

Manufacturer Part Number
MC68360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Controller Family/series
68K
Core Size
32 Bit
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
Supply Voltage Range
3V To 3.6V, 4.75V To 5.25V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Serial Management Controllers (SMCs)
TIMEOUT Command. This transmitter command may be issued when the QUICC imple-
ments the monitor channel protocol. It is issued because the device is not responding or
because GCI A-bit errors are detected. When issued, the QUICC sends an abort request on
the E-bit.
7.11.14.4 SMC GCI MODE REGISTER (SMCMR). The operating mode of an SMC is
defined by the SMCMR. The SMCMR is a 16-bit, memory-mapped, read-write register. The
register is cleared at reset. The functions of bits 7–0 are common to each SMC protocol. The
functions of bits 15–8 vary according to the protocol selected by the SM bits.
Bit 15, 9, 7, 6—Reserved
CLEN—Character Length
ME—Monitor Enable
C#—SCIT Channel Number
SM—SMC Mode
DM—Diagnostic Mode
TEN—SMC Transmit Enable
7-308
15
These bits should be cleared by the user.
This value is used to define the total number of bits in the C/I and monitor channels of the
SCIT channel 0 or channel 1. CLEN ranges from 0 to 15 and specifies values from 1 to
16 bits. CLEN should be written with 13 for the SCIT channel 0 or GCI (8 data bits, plus
A and E bits, plus 4 C/I bits = 14 bits). CLEN should be written with 15 for the SCIT channel
1 (8 data, bits, plus A and E bits, plus 6 C/I bits = 16 bits).
0 = The SMC does not support the monitor channel.
1 = The SMC supports the monitor channel with either the transparent or monitor chan-
0 = SCIT channel 0
1 = SCIT channel 1 (required for Siemens ARCOFI and SGS S/T chips)
00 = GCI or SCIT support (required for SMC GCI or SCIT operation)
01 = Reserved
10 = UART
11 = Totally transparent operation
00 =Normal operation
01 =Local loopback mode
10 = Echo mode
11 = Reserved
0 = SMC transmitter disabled
1 = SMC transmitter enabled
14
nel protocol as defined in the MP bit.
13
CLEN
12
11
Freescale Semiconductor, Inc.
For More Information On This Product,
ME
10
MC68360 USER’S MANUAL
Go to: www.freescale.com
9
C#
8
7
6
5
SM
4
3
DM
2
TEN
1
REN
0

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