dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 315
![no-image](/images/manufacturer_photos/0/2/263/freescale_semiconductor__inc_sml.jpg)
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 315 of 637
- Download datasheet (4Mb)
Explanation of Example: Prior to execution, the 24-bit X location X:$FFE4 (I/O port B
data register) contains the value $FFFFFF. The execution of the BCLR #$E,X:<<$FFE4
instruction tests the state of the 14th bit in X:$FFE4, sets the carry bit C accordingly, and
then clears the 14th bit in X:$FFE4.
Condition Codes:
CCR Condition Codes:
For destination operand SR:
For destination operand A or B:
MOTOROLA
BCLR
C — Cleared if bit 0 is specified. Not affected otherwise.
V — Cleared if bit 1 is specified. Not affected otherwise.
Z — Cleared if bit 2 is specified. Not affected otherwise.
N — Cleared if bit 3 is specified. Not affected otherwise.
U — Cleared if bit 4 is specified. Not affected otherwise.
E — Cleared if bit 5 is specified. Not affected otherwise.
S —Computed according to the definition. See Notes on page A-55.
L — Set if data limiting has occurred. See Notes on page A-55.
E — Not affected
U — Not affected
N — Not affected
Z — Not affected
V — Not affected
L — Cleared if bit 6 is specified. Not affected otherwise.
S — Cleared if bit 7 is specified. Not affected otherwise.
C — Set if bit tested is set. Cleared otherwise.
LF
15
DM
14
13
T
Freescale Semiconductor, Inc.
**
12
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
Bit Test and Clear
I1
9
I0
8
S
7
L
6
E
5
U
4
CCR
N
3
Z
2
V
1
C
0
BCLR
A - 49
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