dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 79

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

5.1
This section describes the hardware of the program control unit (PCU) and concludes
with a description of the programming model. The instruction pipeline description is also
included since understanding the pipeline is particularly important in understanding the
DSP56K family of processors.
5.2
The program control unit is one of the three execution units in the central processing
module (see Figure 5-2). It performs program address generation (instruction prefetch),
instruction decoding, hardware DO loop control, and exception (interrupt) processing.
The programmer sees the program control unit as six registers and a hardware system
stack (SS) as shown in Figure 5-1. In addition to the standard program flow-control
resources, such as a program counter (PC), complete status register (SR), and SS, the
program control unit features registers (loop address (LA) and loop counter (LC)) dedi-
cated to supporting the hardware DO loop instruction.
The SS is a 15-level by 32-bit separate internal memory which stores the PC and SR for
subroutine calls, long interrupts, and program looping. The SS also stores the LC and LA
registers. Each location in the SS is addressable as a 16-bit register, system stack high
(SSH) and system stack low (SSL). The stack pointer (SP) points to the SS locations.
MOTOROLA
PROGRAM CONTROL UNIT
OVERVIEW
INTERRUPTS
Figure 5-1 Program Address Generator
Freescale Semiconductor, Inc.
CONTROL
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CLOCK
PROGRAM CONTROL UNIT
PROGRAM CONTROL UNIT
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PAB
OMR
16
PC
LC
SP
LA
SR
GLOBAL DATA BUS
24
PDB
24
32 x 15
STACK
24
5 - 3