dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 352

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
A complete discussion of the various division routines is beyond the scope of this man-
ual. For a more complete discussion of these routines, refer to the application note enti-
tled Fractional and Integer Arithmetic Using the DSP56001 .
For extended precision division (i.e., for N-bit quotients where N>24), the DIV instruction
is no longer applicable, and a user-defined N-bit division routine is required. For further
information on division algorithms, refer to pages 524–530 of Theory and Application of
Digital Signal Processing by Rabiner and Gold (Prentice-Hall, 1975), pages 190–199 of
Computer Architecture and Organization by John Hayes (McGraw-Hill, 1978), pages
213–223 of Computer Arithmetic: Principles, Architecture, and Design by Kai Hwang
(John Wiley and Sons, 1979), or other references as required.
Condition Codes
L — Set if overflow bit V is set
V — Set if the MS bit of the destination operand is changed as a result of the
C — Set if bit 55 of the result is cleared.
A - 86
DIV
instruction’s left shift operation
15
LF
DM
14
:
13
T
Freescale Semiconductor, Inc.
**
12
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
Divide Interation
I1
9
I0
8
S
7
L
6
E
5
U
4
CCR
N
3
Z
2
V
1
C
0
MOTOROLA
DIV

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