dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 40

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

bined to form one 48-bit data limiter for long-word operands.
For example, if the source operand were 01.100 (+ 1.5 decimal) and the destination reg-
ister were only four bits, the destination register would contain 1.100 (- 1.5 decimal) after
the transfer, assuming signed fractional arithmetic. This is clearly in error as overflow has
occurred. To minimize the error due to overflow, it is preferable to write the maximum
(“limited”) value the destination can assume. In the example, the limited value would be
0.111 (+ 0.875 decimal), which is clearly closer to + 1.5 than - 1.5 and therefore intro-
duces less error.
Figure 3-5 shows the effects of saturation arithmetic on a move from register A1 to regis-
ter X0. The instruction “MOVE A1,X0” causes a move without limiting, and the instruction
“MOVE A,X0” causes a move of the same 24 bits with limiting. The error without limiting
is 2.0; whereas, it is 0.0000001 with limiting. Table 3-1 shows a more complete set of
limiting situations.
3.2.5.2
The data shifters can shift data one bit to the left or one bit to the right, or pass the data
unshifted. Each data shifter has a 24-bit output with overflow indication and is controlled
by the scaling mode bits in the status register. These shifters permit dynamic scaling of
fixed-point data without modifying the program code. For example, this permits block
floating-point algorithms such as fast Fourier transforms to be implemented in a regular
fashion.
3.3
The DSP56K uses a fractional data representation for all Data ALU operations. Figure 3-
3 - 10
7
55
0 . . . 0 1 0 0 . . . . . . . . . . . 0 0
* Limiting automatically occurs when the 56 - bit operands A or B (not A2, A1, A0, B2, B1, or B0) are read. The contents
of A or B are NOT changed.
0 23
DATA REPRESENTATION AND ROUNDING
1 0 0 . . . . . . . . . . . 0 0
23
Scaling
WITHOUT LIMITING*
0
0 23
MOVE A1, X0
DATA REPRESENTATION AND ROUNDING
0 0 . . . . . . . . . . . . 0 0
X0 = -1.0
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 3-5 Saturation Arithmetic
DATA ARITHMETIC LOGIC UNIT
|ERROR| = 2.0
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0
0
A = +1.0
55
7
0. . . 0 1 0 0 . . . . . . . . . . . 0 0
0 23
23
0 1 1 . . . . . . . . . . . 1 1
WITH LIMITING*
MOVE A, X0
0
0 23
0 0 . . . . . . . . . . . . 0 0
X0 = +0.9999999
|ERROR| = .0000001
MOTOROLA
0
0
A = +1.0